Design of Logically Obfuscated Memory and Arithmetic Logic Unit for Improved Hardware Security

Abstract

In any kind of digital system, the processor and memories are used to play a vital role in today’s trend. The processors and memories are done many critical tasks in the system. Whereas the processor used to do several functions and memories used to store and retrieve the data. But these processors and memories are more vulnerable to various hardware attacks. By using several new devices may lead to many security issues which the attackers can leverage to introduce a new hardware attack. Various hardware security (HS) studies have been presented to prevent hardware from a security issue. Some of the security issues that are occurred in hardware are overbuilding, piracy and reverse engineering (RE) and so on. In many works of literature, obfuscating and camouflaging are done in the netlist of hardware devices. Even though, these methods are highly overheads, and also not secured up to the level of expectation. Therefore, the main motive of Hardware security is to secure an Arithmetic Logic Unit (ALU) processor and memory unit from the various threats. In this work, a Configurable GDI based Locking cell (GLC) is proposed which is added as redundant to the original netlist of ALU and memory units for its hardware protection. The basic concept of configurable GLC is to perform a wire or inverter by using keys to obfuscate an attacker. This GLC logic can overcome the drawback of existing methods based on obfuscation and cryptographic techniques. The results show that proposed GLC is possible in any kind of memory system, all with low area and delay penalty.