Design of Hybrid CMOS Non-Volatile SRAM Cells in 130nm RRAM Technology

Hussein Bazzi,Adnan Harb,Hassen Aziza,Mathieu Moreau

doi:10.1109/icm.2018.8704119

Design of Hybrid CMOS Non-Volatile SRAM Cells in 130nm RRAM Technology

Hussein Bazzi, Adnan Harb + Show 2 more

https://doi.org/10.1109/icm.2018.8704119

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Publication Date: Dec 1, 2018

Citations: 16

Affiliation: Lebanese International University, Aix-Marseille University, Institut des Matériaux, de Microélectronique et des Nanosciences de Provence, French National Centre for Scientific Research

#Non-Volatile Static Random-Access Memories #Static Random-Access Memories + Show 8 more

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Abstract

Static Random-Access Memories (SRAMs) are very common in today’s chips industry thanks to their speed and power consumption but they are classified as volatile memory. Non-Volatile SRAMs (NVSRAMs) combine SRAM features with non-volatility. This combination has the advantage to retain data after power off or in the case of power failure, enabling energy-efficient and reliable systems under frequent power-off conditions. This paper presents a detailed overview on Resistive RAM-based NVSRAM structures, with deep looking on the ability to store and restore data. After reviewing the designs, a comparison in terms of speed, power consumption and design complexity is presented for 2 NVSRAM memory cells (6T2R and a 10T1R) implemented in a 130-nm high voltage CMOS technology from STMicroelectronics.

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