Design Of High-Speed Low Voltage Operational Amplifier

Abstract

Background: The Operational amplifier (op-amp) is the building block of linear integrated electronics, therefore proposing newer design models with improved parameters is an essential landmark in the electronics industry in the hunt for a faster and more efficient design. Objective: To attain high speed and low power supply, the authors designed an op-amp using three different techniques. Initially compensating network was designed and simulated but the resultant output voltage saturates in inverting and non-inverting modes. Methods: Voltage feedback op-amp (VFOA) and current feedback op-amp (CFOA) were proposed to achieve the target. The authors have successfully designed the circuit, but the power dissipated is less and Common Mode Rejection Ratio (CMRR) is high in CFOA in comparison to VFOA. Results: The results are simulated for three different configurations and inverting configuration results in remarkable results in comparison to a non-inverting and differential amplifier. Inverting configuration using VFOA results in 91.22dB, and 0.0131W CMRR and power dissipation, respectively, while that of CFOA results in 97.34dB, and 0.0129W CMRR, and power dissipation, respectively. Conclusion: 1.6% improvement in CMRR and a 26.8% improvement in power dissipated for the proposed CMOS CFOA in comparison to the proposed VFOA. All the validations are done by plotting the bode plot and Nyquist plot.