Abstract

Data compression reduces the cost of data storage and transmission by decreasing the data size. Previous studies have improved system performance by adaptively choosing the compression ratio (CR) and throughput required for the system by using a trade-off between them in the compression algorithm. Hardware accelerators are widely used to reduce the CPU load caused by compression operations. Several existing compression accelerators have low flexibility in changing the CR and bandwidth. This study proposes a hardware compression accelerator that can adjust the CR and throughput at runtime. The proposed architecture accelerates the LZ77 compression algorithm and supports the throughput-first (TF) and compression ratio-first (CF) modes by changing the degree of parallelism of comparison operations performed during the compression process. In addition, we propose a technique to dynamically change the degree of parallelism of the comparison operation to achieve a better throughput in CF mode and a better CR in TF mode. Experimental results demonstrate that the TF mode provides a throughput higher by 11.39%, and a CR lower by 0.07 than the CF mode. The value 0.07 accounts for 13.21% of the variation in the CR provided by the software implementation of LZ77.

Highlights

  • The volume of digital data has been continuously increasing owing to the development of information communication technology [1], [2]

  • This architecture operates in compression ratio-first (CF) mode or TF mode by adjusting the degree of parallelism of comparison operations

  • We propose a dynamic skip scheme, which dynamically adjusts the degree of parallelism of comparison operations

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Summary

INTRODUCTION

The volume of digital data has been continuously increasing owing to the development of information communication technology [1], [2]. Previous studies have pointed out that the appropriate CR and throughput differ according to the context of the computing system [12]–[15] These studies use a trade-off between CR and throughput to adaptively select the appropriate CR and throughput for the system context under consideration, thereby increasing the service capacity of the web server or reducing the I/O response time of the storage. Some previous researches studied compression acceleration techniques and achieved high bandwidth by parallelizing frequently performed operations [20]–[22]. The proposed architecture adjusts the CR and throughput by changing the degree of parallelism of the string search performed during the compression process and the comparison operation required for the string search.

BACKGROUND
ARCHITECTURE OVERVIEW
DYNAMICALLY ADJUSTING THE DEGREE OF PARALLELISM
FIRST STEP
SECOND STEP
EXPERIMENTS AND RESULTS
CONCLUSION

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