Abstract
Automation of generating hardware description language code of neural networks models can highly decrease time of implementation those networks into a digital devices, thus significant money savings. To implement the neural network into hardware design, it is required to translate generated model into device structure. VHDL language is used to describe those networks into hardware. VHDL code has been proposed to implement ANNs as well as to present simulation results with floating point arithmetic of the earth station and the satellite power systems using ModelSim® PE 6.6 simulator tool. Integration between MATLAB® and VHDL is used to save execution time of computation. The results shows that a good agreement between MATLAB and VHDL and a fast and flexible feed forward NN which is capable of dealing with floating point arithmetic operations; minimum number of CLB slices; and good speed of performance. FPGA synthesis results are obtained with view RTL schematic and technology schematic from Xilinix tool. Minimum number of utilized resources is obtained by using Xilinix VERTIX5.
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More From: TELKOMNIKA (Telecommunication Computing Electronics and Control)
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