Design of fault-tolerant computing systems using real-time performance monitors

Abstract

Most performance monitoring techniques in use today generally provide limited error detectability, require a substantial increase in hardware and may have an adverse effect on system performance. This paper demonstrates the viability of using specially designed real-time performance monitors to perform concurrent error detection using residue code. This technique of performance monitoring using residue code seems to offer great potential especially with the advent of very dense “smart” VLSI modules.