Design of CMOS front-end circuitry for the acquisition of biopotential signals

Abstract

This paper presents the design of the front-end circuitry of a low power and low noise analog biopotential signal acquisition system. The design has been optimized for low power consumption while still achieving the gain, bandwidth and input referred noise required by this application. The design consists of three main building circuit blocks. The first stage is the instrumentation amplifier which amplifies and filters the biopotential signals and provides a gain of 13.9 dB. This stage is based on current feedback techniques and achieves a CMRR of 124 dB, while the integrated input referred noise is 2.67 μV rms . This is followed by an analog multiplexer, which allows the system to process multiple signals. The last stage is the programmble gain amplifier, which allows the overall gain to be set according to the type of biopotential signal, in the range from 13.9 dB to 73.9 dB. Each instrumentation amplifier consumes 10 μW while the programmable gain amplifier consumes 61 μW from a 2 V supply, making the design appropriate for battery operation. A standard 0.35 μm CMOS technology was used in this work.