Abstract

Optical Burst Switching (OBS) is an emerging technology that allows variable size data bursts to be transported directly over DWDM links without encountering O/E/O conversion. In OBS, before the transmission of a data burst, a burst header is transmitted through an electronic control path, setting up and tearing down optical paths on-the-fly. Data bursts can remain in the optical domain and pass through the OBS network transparently. Unfortunately, system performance will be greatly degraded, if burst scheduling requests cannot be processed in time. This article quantitatively studied the negative impact of control path overloading on the performance of OBS networks. Results have shown that control path overloading greatly affects the performance of the OBS routers, especially for systems with large WDM channel counts. In order to remove this performance bottleneck, we have designed and implemented an ultra fast pipelined burst scheduler that is able to process a burst request every two clock cycles, regardless of the number of WDM channels per link. The design has been implemented in Verilog HDL and synthesized to FPGAs. Circuit level simulation results confirm the correctness of the design. The circuit has achieved 100 MHz in Altera Cyclone II devices, allowing the scheduler to process a burst request every 20 ns. To the authors’ best knowledge, this is the fastest implementation of burst scheduling algorithms.

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