Abstract
The appropriate selection of moduli has a significant impact on the reverse converter's speed and complexity. The modified converter depends upon the arithmetic designs that are implemented without the read - only memories and lookup tables. The Carry Save Adder and Carry Propagate Adder are used in the reverse converter and modulo adder gives higher speed and less hardware complexity. The proposed converter has been implemented to get the conversion time and area as supported by the reverse converter of 12-bits and maximum up to 100-bits.
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