Design of a Voltage to Time Converter with High Conversion Gain for Reliable and Secure Autonomous Vehicles

Nandakishor Yadav,Kyuwon Ken Choi,Mahmoud Alashi,Youngbae Kim

doi:10.3390/electronics9030384

Nandakishor Yadav, Kyuwon Ken Choi + Show 2 more

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https://doi.org/10.3390/electronics9030384

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Journal: Electronics	Publication Date: Feb 26, 2020
Citations: 4	License type: CC BY 4.0

Affiliation: Illinois Institute of Technology

Abstract

Automation of vehicles requires a secure, reliable, and real-time on-chip system. These systems also require very high-speed and compact on-chip analog to digital converters (ADC). The conventional ADC cannot fulfill this requirement. In this paper, we proposed a Darlington pair- and source biasing-based high speed, secure, and reliable voltage to time converter (VTC). It is a compact, high-speed design and gives high conversion gain. The source biasing also helps to increase the input voltage range. The conversion gain of the proposed circuit is 101.43ns/v, which is 52 times greater than the gain achieved by state-of-the-art design. It also shows less effect of process variation and bias temperature instability.

Highlights

The secure and reliable autonomous vehicle is a new research area for the future transportation system
These controllers process huge data using the parallel processors, and the CNN-based accelerator can solve it. These do the dot product using an array of restive or other memories. It uses a number of high-speed analog to digital converters because the digital design has been the main driving force for the emerging nanoscale CMOS technology-based VLSI design
The conversion-gain of the proposed circuit is 101.43 ns/V, which is 52× greater than the conversion gains achieved by state-of-the-art designs (1.95 ns/V) [12,14]

Summary

Introduction

The secure and reliable autonomous vehicle is a new research area for the future transportation system. It is consists of many input sensors and output control signals. These controllers process huge data using the parallel processors, and the CNN-based accelerator can solve it These do the dot product using an array of restive or other memories. It uses a number of high-speed analog to digital converters because the digital design has been the main driving force for the emerging nanoscale CMOS technology-based VLSI design. Scaled device dimensions cause the introduction of leakage current sources such as subthreshold and gate leakage currents These leakage current sources increase the power dissipation [2,3]. The primary goal of this work is to develop a compact, reliable, low power and high conversion gain-based voltage to time converter (VTC) for an ADC

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Conclusion