Design of a VLSI FPGA Intrgrated Circuit

Abstract

Field programmable gate arrays (FPGAs) are extensively used in rapid prototyping and verification of a conceptual design and also used in electronic systems when the mask-production of a custom IC becomes prohibitively expensive due to the small quantity. In addition to their usefulness as mentioned above, their internal structure also makes them as a suitable vehicle to learn all aspects of VLSI design because they consist of combinational logic in the form of LUT (look up table), flip-flops as sequential building blocks, and memory for programmability. VLSI design requires a careful forethought about the entire design process with special attention to floorplanning, layout, routing, transistor sizing, clock and power distribution, and timing analysis. This paper describes all these aspects of VLSI design as applied to the design of a simple FPGA that was designed as an individual project in a VLSI class. The size of the FPGA was restricted to the one that could fit into the MOSIS 40-pin TinyChip padframe. The FPGA consisted of 3-input LUTs as configurable logic blocks, and a chain of shift registers to hold the configuration bits. In addition, output flip-flops were also provided so that a state machine could be implemented in the FPGA. Circuit details of the components are provided in this paper. The layout of the FPGA was done using Magic, and its performance was verified using the IRSIM digital simulator. Finally, the FPGA was programmed to build a traffic light controller. The design process served as a very useful tool to learn about VLSI design since it encompassed all possible aspects of a complex VLSI design.