Design of a sub-microsecond carrier class router: The omnipresent ethernet approach

Abstract

In this paper, we present the design of a microsecond latency carrier-class switch/router using the recently proposed Omnipresent Ethernet (OEthernet for short), technology paradigm. The premise of the OEthernet technology is to convert a network into a binary tree, and then facilitate binary and source routing - using some of the advances of Carrier Ethernet for protocol manifestations. The technology supports higher layer functions like routing, flow control, etc. while facilitating very fast switching (much required in the data-center or service oriented transport environment), and using significantly lesser energy compared to conventional switches and routers. A novel switch architecture (central to the technology) is presented in this paper. The architecture uses a combination of an express crossbar switch along with a new lumped memory contention module. This takes advantage of the binary routing property of the Omnipresent Ethernet technology, while also supporting more traditional contention resolution logic for super-fast switching at high loads/blocking. This opportunistic switching architecture is described in detail from an implementation perspective, with particular focus on the timing requirements. A simulation model verifies our architecture at the switch-level and the network level. Latency through the switch is measured at sub-microsecond - the lowest recorded for switches and routers in this category.