Design of a solid-state fast voltage compensator for klystron modulators requiring constant AC power consumption

Davide Aguglia,Francisco Cabaleiro Magallanes,Philippe Viarouge,Jerome Cros

doi:10.1109/ipmhvc.2014.7287214

Davide Aguglia, Francisco Cabaleiro Magallanes + Show 2 more

Open Access

https://doi.org/10.1109/ipmhvc.2014.7287214

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Abstract

This paper proposes a novel topological solution for klystron modulators integrating a Fast Voltage Compensator which allows an operation at constant power consumption from the utility grid. This kind of solution is mandatory for the CLIC project under study, which requires several hundreds of synchronously operated klystron modulators for a total pulsed power of 39 GW. The topology is optimized for the challenging CLIC specifications, which require a very precise output voltage flat-top as well as fast rise and fall times (3μs). The Fast Voltage Compensator is integrated in the modulator such that it only has to manage the capacitor charger current and a fraction of the charging voltage. Consequently, its dimensioning power and cost is minimized.

Highlights

The utilization of pulsed power converters is growing more and more nowadays, in the medical and in the experimental particle physics domain
This paper proposes a novel topological solution for klystron modulators integrating a Fast Voltage Compensator which allows an operation at constant power consumption from the utility grid
This kind of solution is mandatory for the CLIC project under study, which requires several hundreds of synchronously operated klystron modulators for a total pulsed power of 39 GW

Summary

INTRODUCTION

The utilization of pulsed power converters is growing more and more nowadays, in the medical and in the experimental particle physics domain. Active solutions able to solve the power fluctuation issue in a more efficient way shall be found Since for this accelerator several hundreds of klystron modulators are required to operate synchronously, producing a total pulsed power of 39GW, optimal topological and design solutions must be evaluated such that only a constant average power (300MW) is withdrawn from the utility grid

FAST VOLTAGE COMPENSATOR

OUTPUT FILTER DESIGN

C FVC C main

CONTROL STRATEGY

PERFORMANCES EVALUATION BY

Findings

CONCLUSION