Abstract

Abstract Power Line Communications (PLC) is a technology that takes advantage of the existing electrical infrastructure to deploy communication networks. This paper proposes an architecture for the physical layer (PHY) of a PLC transceiver based on Orthogonal Frequency Division Multiplexing (OFDM) and inspired in the IEEE 1901 standard for Broadband PLC. The designed system is synthesized on a Xilinx Spartan-6 FPGA device, and supports data rates up to 107 Mbps.

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