Design of a novel ternary SRAM sense amplifier using CNFET

Abstract

This paper presents a novel design of a ternary SRAM sense amplifier using carbon nanotube field-effect transistors (CNFETs). Chirality of CNFET is used to control the threshold voltage to realize the ternary logic. Simulation results using HSPICE shows that the proposed SRAM sense amplifier perform correctly at 0.9V supply voltage in the ternary SRAM read process. And it can achieve 87.5% and 88.5% enhancement in speed, 84.2% and 85.6% in PDP, compared with a ternary DRAM sense amplifier and the ternary SRAM without sense amplifier.