Abstract
This paper presents a full-custom front-end readout application-specific integrated circuits (ASIC) to obtain a compact platform for flat panel PET imaging systems which are recently proposed for both clinic and small animal applications due to their attractive features such as good flexibility, high sensitivity and low cost. In this paper, the one-chip solution for front-end readout chains, a high-precision TDC and a fast ADC is presented. A multi-channel prototype chip is designed in TSMC 0.18 µm CMOS technology. In the front-end readout chains, the dynamic range, the linearity, and the power dissipation are optimized. The input dynamic range from 480 fC to 520 pC can be achieved. The analog output range of the front-end readout circuits is from 1 V to 3 V. The shaping time is 300 ns and the power dissipation is reduced to less than 15 mW. To digitize the energy voltages, an 8-bit 25-MS/s pipeline ADC is proposed to identify a energy range of 150 keV ∼ 800 keV. With the requirements of coincidence evaluation and time-of-flight capability, the TDC is realized by dual-counter and DLL techniques. The bin size of the TDC are 625 ps. Besides, a JTAG controller is integrated as well to initiate the chip and to perform the test of mixed-signal circuits.
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