Abstract
A memristor element has been highlighted in recent years and has been applied to several applications. In this work, a memristor-based digital to analog converter (DAC) was proposed due to the fact that a memristor has low area, low power, and a low threshold voltage. The proposed memristor DAC depends on the basic DAC cell, consisting of two memristors connected in opposite directions. This basic DAC cell was used to build and simulate both a 4 bit and an 8 bit DAC. Moreover, a sneak path issue was illustrated and its solution was provided. The proposed design reduced the area by 40%. The 8 bit memristor DAC has been designed and used in a successive approximation register analog to digital converter (SAR-ADC) instead of in a capacitor DAC (which would require a large area and consume more switching power). The SAR-ADC with a memristor-based DAC achieves a signal to noise and distortion ratio (SNDR) of 49.3 dB and a spurious free dynamic range (SFDR) of 61 dB with a power supply of 1.2 V and a consumption of 21 µW. The figure of merit (FoM) of the proposed SAR-ADC is 87.9 fj/Conv.-step. The proposed designs were simulated with optimized parameters using a voltage threshold adaptive memristor (VTEAM) model.
Highlights
Chua has discovered the existence of a passive two-terminal fundamental element, which is called a memristor [1]
The proposed designs were simulated with optimized parameters using a voltage threshold adaptive memristor (VTEAM) model
We proposed configuration usinganneural networks as an artificial intelligence techniqu a design
Summary
Chua has discovered the existence of a passive two-terminal fundamental element, which is called a memristor [1]. There are a few different research directions for the use of memristors in DAC and digital to analog converters), since it has a lower area and is faster than the designs. The memristor is a natural counterpart to the fundamental using neural networks as an artificial intelligence technique [6] Another kind of research analog relationship, memristance valueusing changes according to the implemented hybrid DAC as andthe. Successive approximation register analog to digital converter that adesign to implement a multi-layer neural network [8].(SAR-ADC) using the proposed memristor has been provided to achieve low area and low power, aspresent. The last section explains the conclusion of this work, followed by the references
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