Abstract
A novel Under Voltage Lock Out (UVLO) circuit is proposed in this paper. Compared with traditional bandgap structure UVLO, base current generation and compensation circuits are introduced in this designed UVLO circuit to gain better performance, especially with ultra-low $\beta$. So the temperature drift of VTII can be minimized, an accurate threshold voltage (VTii) can be achieved. It is designed by using $0.1S\mu m 5V$ CMOS process. The simulation results show that the VTII in the proposed circuit is 3. $3S0V$, and its deviation is $49mV$ in the temperature range of -40~125°C.
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