Design of a circuit-switched highly fault-tolerant k-ary n-cube

Abstract

In this paper we present a strongly fault-tolerant design for the k-ary n-cube multiprocessor and examine its reconfigurability. Our design augments the k-ary n-cube with (/sup k///sub j/)/sup n/ spare nodes; each set of j/sup n/ regular nodes is connected to a spare node and the spare nodes are interconnected as a (/sup k///sub j/)-ary n-cube. Our approach utilizes the circuit-switched capabilities of the communication modules of the spare nodes to tolerate a large number of faulty nodes and faulty links without any performance degradation. Both theoretical and simulation results are presented.