Abstract

In this paper, we propose a non-volatile SRAM, which presents simultaneously low power dissipation and high speed. This SRAM is based on MRAM (Magnetic RAM technology on standard CMOS. In this non-volatile SRAM design, we use Magnetic Tunnel Junctions (MTJ) as storage element. A 4-bit SRAM cell is designed and its read-write operations are described. Sense Amplifier is used in the read operation model. Two Write-Enable transistors and two inverters are used in the write operation model. The 4-bit SRAM cell has been implemented using Tanner tool. The operation of the SRAM cell is clearly understood from the output waveforms obtained after implementation. The structure and working of Magnetic Tunnel Junction is studied. The design of a Non-Volatile SRAM using Magnetic Tunnel Junction is proposed.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.