Abstract
This paper presents the design of a 2.4GHz power amplifier (PA) with high efficiency and the PA is implemented in 0.18μm RF CMOS process. Differential structure is used to reduce the effect of source inductance on the circuit. Output matching network is designed to reduce the chip area. Test results show that with the supply voltage 1V, the maximum output power is about 8dBm, and the maximum PAE is 19%. When the input power is −10dBm, S 11 is lower than −23dB, and S 22 is lower than −9dB.
Full Text 
Sign-in/Register to access full text options
Sign-in/Register to access full text options 
Published version (
Free)
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
