Design of 64-Bit High-Performance Embedded Processor Supporting RISC-V B-Extension

Abstract

With the continuous development of IoT technology, edge computing and high-performance computing are being merged. Compared with 32-bit processors, 64-bit processors have obvious advantages in processing some large data sets and high-precision numerical computing tasks. At the same time, as an open-source instruction set, RISC-V has highly concise instruction coding and flexible modular expansion, which is very suitable for the implementation of embedded processors. In this paper, we refer to the micro-architecture of the open-source 32-bit RISC-V processor SweRV EH1 and design a 64-bit embedded processor that supports the RV64IMCB instruction set. We adopt the instruction set self-checking test scheme based on riscv-tests to complete the functional verification of the processor and carry out the FPGA prototype verification on the Xilinx KC705 hardware platform. Compared with the 32-bit SweRV EH1, the Dhrystone performance improved by 32.3% on 64-bit processors with B-extension. The experiment shows that implementing the B-extension in a 64-bit processor can bring a 28.8% increase in Dhrystone performance and an 11.8% increase in CoreMark performance with an additional area overhead of 8.4%.