Design of 3‐dB parallel‐line coupler using the substrate integrated double‐strip coaxial line with performance enhancement

Abstract

AbstractThe contribution of this work is to propose a 3‐dB parallel‐line coupler design using the novel substrate integrated double‐strip coaxial line (SIDSCL). The SIDSCL is composed of three substrates with two signal strips embedded in the center of the SIDSCL tunnel. The proposed coupler's coupled‐line section formed by the SIDSCL's two broad‐side‐faced strips resolves the very difficult‐to‐achieved 3‐dB tight coupling task and possesses an extremely wide operating bandwidth. Its flexible circuit layout diversity allows the through‐ and coupled‐port to be laid either on the same side or on the opposite side. A patch capacitance is attached to each branch‐line to compensate for the parasitic inductance and capacitance that are arisen near the branch junction. As a result, the isolation and impedance matching are greatly improved.