Design methodology innovations address manufacturing technology challenges: power and performance

Abstract

Semiconductor design has benefited tremendously from process technology scaling in the past, especially for power consumption and performance. This era is coming to an end. Continued improvement in these key metrics requires even more innovation in design methodology and design automation than in the past. Power consumption increasingly is becoming the most important bottleneck in the design of ICs in advanced process technologies. An evaluation of the use ultra-low threshold voltage (V/sub th/) devices for power reduction in an advanced process technology is described. It turns out that in contrast to older process technologies, this approach increasingly is becoming less suitable for industrial usage in advanced process technologies. Thus, design methodologies are described which can reduce power consumption by optimizations in logic design, specifically by utilizing multiple levels of supply voltage V/sub dd/ and threshold voltage V/sub th/. The next major challenge on the horizon is increasing variability, both in the manufacturing process and in operating conditions. The need for statistical approaches to counter rising variability is described.