Abstract

This paper discusses the design methodologies and fabrication of a 4H-SiC lateral reduced surface electric field (RESURF) Schottky barrier diode (SBD), using a very thin (0.7 μm) RESURF layer. The proposed optimization of the anode and cathode edge structure with recessed etch into mesa termination minimizes the electric field induced impact ionization at the edge of the active area. Three-dimensional simulations were conducted to optimize electric field distribution and enable close to ideal RESURF breakdown voltage within the device, while enabling junction isolation structure between neighboring devices through mesa etch. The design methodologies and the fabricated lateral SBD offer guidance for future efforts toward realizing a monolithic SiC high voltage integrated circuit.

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