Design Issues in a Performance Monitor for Embedded Multi-core Systems

Abstract

Multi-core processors have elevated the performance of software via true parallelization. However, this has also created new challenges. One serious issue is the bottleneck in system performance due to synchronization, cache misses, or resource starvation, which is hard to detect in application software with runtime changing behavior. Performance monitors are usually employed for such detection. Nevertheless, monitors have introduced their own computation and communication overheads, especially in embedded multi-core systems. In this work, we propose a multi-core performance monitor and evaluate the effects of monitor overheads on different types of tasks, such as CPU-bound and IO-bound tasks. Further, we give suggestions on the number of monitors and the type of monitor deployments for embedded multi-core applications. Besides trying to reduce monitor overheads, we also aim at the accuracy and the immediacy of the monitored information. Through a real-world example, namely digital video recording system, we demonstrate how different monitoring periods affect the tradeoff between the accuracy and the immediacy.