Design Issues for Real-Time PMSM Power-Hadware-in the-Loop: Analysis at Switching Frequency

Abstract

This paper focuses on the modelling of the current ripple in a Power-Hardware-in-the-Loop (PHIL) emulator of an isotropic Permanent Magnet Synchronous Machine (PMSM). In such applications, one of the main challenges is to replicate the current behavior when the inductance that is installed in the PHIL differs from that of the emulated machine. This is because the power emulator must emulate the current ripple at the switching frequency of the Device Under Test (DUT). A theoretical analysis is carried on deriving the equations that describe the current waveform in the PHIL. An expression for the current error between the PHIL system and the emulated one is derived and the parameters that affect the error are highlighted. Mathematical expressions for the control actions needed to bring the current error to zero are proposed and the technical limitations in their application are discussed. Simulation results confirm the effectiveness of the proposed analysis.