Abstract
Schottky barrier diode (SBD) embedded planer gate metal-oxide-semiconductor field effect transistors (MOSFETs) are one of the most promising SiC switching devices owing to their well-established reliability. In this paper, an effective SBD distribution was proposed in order to achieve both low specific on-resistance (R <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</inf> A) and sufficient diode conduction capability. The proposed checked pattern SBD structure exhibited a superior parasitic body p-n diode clamping effect 2 times better than did the conventional striped SBD pattern. Increased channel density due to small area penalty of embedding the SBD successfully contributed to a low R <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</inf> A of $2.7 m\Omega$ cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> for a 1.2 kV-class SBD embedded MOSFET while improving diode conduction capability.
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