Design guidelines and comparison of detector readout front end integrated S-G shapers using transconductance circuits

Abstract

An analysis of readout front end electronics semi-gaussian (S-G) shapers is carried out. Innovative design methodology is proposed and an advanced filter design technique based on operational transconductance amplifiers (OTA) is used, in order to implement fully integrated structures. Three respective novel CMOS shaper topologies are designed and compared in terms of noise performance, total harmonic distortion, dynamic range and power consumption as to examine which is the most preferable in readout applications. Analysis is supported by simulations results using SPICE in a 0.6 µm process by the Austria Mikro Systeme (AMS). The optimum implementation appears to be the OTA based cascade shaper structure with the inductor simulation. The specific shaper implementation is used in a fully integrated preamplifier-shaper system for a space application silicon strip detector of 2 pF capacitance. The readout system achieves an equivalent noise charge of 327 electrons at 1.7 µs peaking time in −40°C.