Design Considerations for ZnO Transistors Made Using Spatial ALD

Abstract

We have used spatial atomic layer deposition (SALD) to fabricate metal oxide thin-film devices with unusually simple processes. Selective area deposition allows us to fabricate transistors and circuits additively and with digital design variations when used in combination with an inkjet-printed inhibitor. In a second approach, we use the conformal nature of SALD films to produce self-aligned sub-micron channel length vertical transistors that have large alignment tolerances and are suitable for high-performance thin-film electronics. We discuss device design considerations for both architectures.