Abstract
This paper presents a design procedure for practical implementation of current mode instrumentation amplifier (CMIA). The design flow highlights the major tradeoffs in the design of CMIA, enabling a designer to optimize the design as per the desired critical performance specifications. PSRR analysis of the implemented CMIA is also presented. The target specifications comprise a CMRR better than 100 dB without using choppers and without trimming, programmable bandwidth, accurate and stable gain, rail to rail output swing with 100 pF capacitive load driving capability while minimizing the power dissipation and the area. The gain is programmable from 34 dB to 60 dB and the bandwidth is programmable upto 10 kHz. The thermal noise floor is 145 nV/√Hz. The presented chopper-less CMIA has been designed and optimized in 180 nm mixed-mode CMOS technology. It features high CMRR of > 112 dB in the presence of 4.5 mV input offset voltage without any chopper modulator.
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