Abstract
Effect of design parameters including device geometry, doping, and bias on key performance is investigated in a diode-type NAND flash memory cell string working under positive feedback (PF) mechanism. The string has a tube-type poly-Si channel, ${n} ^{+}$ and ${p} ^{+}$ regions on both ends of the string. A device simulator used in this paper is calibrated with measured trap density and poly-Si body parameters. It is shown that on-current of the PF diode-type cell string is affected significantly by electric junction barrier ( $V_{\mathrm{ EJB}} $ ) in the channel of the cell string. With different device dimensions, the PF diode-type cell string has almost constant, steep SS characteristic, but conventional FET-type cell string shows a large change in SS.
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