Design and validation of an artificial neural network based on analog circuits

Abstract

This paper focuses on the design and validation of an analog artificial neural network. Basic building blocks of the analog ANN have been constructed in UMC 90 nm device technology. Performance metrics of the building blocks have been demonstrated through circuit simulations. The weights of the ANN have been estimated through an automated back-propagation algorithm, which is running circuit simulations during weight optimization. Two case studies, the operation an XOR logic gate and a full adder circuit have been captured using the proposed analog ANN. Monte Carlo analysis of the XOR gate reveals that the analog ANN operates with an accuracy of 99.85%.