Design and simulation of high-breakdown-voltage GaN-based vertical field-effect transistor with interfacial charge engineering

Abstract

A high-breakdown-voltage GaN-based vertical field-effect transistor with negative fixed interfacial charge engineering (GaN ICE-VHFET) is proposed in this work. The negative charge inverts an n-GaN buffer layer along the oxide/GaN interface, inducing a vertical hole layer. Thus, the entire buffer layer consists of a p+-hole inversion layer and an n-pillar buffer layer, and the p-pillar laterally depletes the n-GaN buffer layer, and the electric field distribution becomes more uniform. Simulation results show that the breakdown voltage of the GaN ICE-VHFET increases by 193% and the on-resistance of such a device is still very low when compared with those of conventional vertical FETs. Its figure of merit even exceeds the GaN one-dimensional limit.