Design and simulation of a parallel adaptive arbiter for maximum CPU utilization using multi-core processors

Abstract

Parallelization of task is considered to be a huge challenge for future extreme-scale computing system. Sophisticated parallel computing system necessitates solving the bus contention in a most efficient manner with high computation rate. The major challenge to deal with is the achievement of high CPU core usage through increased task parallelism by keeping moderate bus bandwidth allocation. In order to tackle the aforesaid problems, a novel arbitration technique, known as Parallel Adaptive Arbitration (PAA) has been proposed for the masters designed according to the traffic behaviour of the data flow. These masters are implemented using a synthetic benchmark program that measures sustainable memory bandwidth and the corresponding computational rate. The proposed arbitration technique is a strong case in favour of fair bandwidth optimization and high CPU utilization, as it consumes the processor cores up to 77% through high degree of task parallelization and also reduces bandwidth fluctuation. Some of the works published so far in this area are reviewed, classified according to their objectives and presented in an organised manner with a conclusion.