Design and Simulation of 140 dB Dynamic Range and 20 uVrms Readout Noise CMOS Image Sensor

Abstract

This paper provides the design, simulation andimplementation of a very wide dynamic range and a low readoutnoise CMOS image sensor (CIS) with high sensitivity by using adiode connected transistors in parallel with floating diffusionnode and sensor output. The sensor is simulated, designed andimplemented in a 130 nm CMOS technology using cadence tool.The area of the proposed pixel reaches to 3 um x 3 um andconsists of seven NMOS transistors and one capacitor. Thereadout circuit has the following parameters as very low outputnoise of 20 uVrms with a 5 MHz bandwidth for pixel circuitry.Power dissipation of 10 uW was achieved at an operation voltageof 1.6 V for pixel circuitry. The proposed sensor has goodfeatures of low noise and a 140 dB wide dynamic range due to thediode connected transistor configuration that has been used. Thispaper provides the effect of adding a diode connected transistorsM7 and M8 on an increasing dynamic range of CMOS imagesensor to 140 dB and reducing its readout noise to 20 uVrms. Also,this paper provides a mathematical simulation of noise model ofCIS using Matlab and cadence.