Design and realization of DRFM system based on FPGA and DSP

Abstract

A Digital Radio Frequency Memory (DRFM) system is designed to digitize a Radio Frequency (RF) input signal at a specific frequency and bandwidth to represent the signal adequately, and then reconstruct that RF signal after a series of process such as storage, time-delay and frequency shifting. The hardware requirement for general purpose DRFM system is analyzed and the hardware architecture based on the FPGA and DSP techniques is proposed. Due to a reasonable division of the functional module, the overall power consumption is very low. At the same time, online-updating and dynamic loading of the FPGA program can be easily achieved through serial peripheral interface (SPI) for operation and debugging. This frame has already been actually applied to a radar deceptive jammer, and it turns out that the system is truly valid.