Design and realization of an efficient VLIC architecture for a linear frequency modulation (LFM) pulse compression in pulsed radars using FPGA

Abstract

Range resolution for given radar can be significantly improved by using very short pulses. Unfortunately, utilizing short pulses decreases the average transmitted power, which can hinder the radar's normal modes of operation, particularly for multi-function and surveillance radars. Since the average transmitted power is directly linked to the receiver SNR, it is often desirable to increase the pulse width while simultaneously maintaining adequate range resolution. This can be made possible by using pulse compression techniques. Pulse compression allows us to achieve the average transmitted power of a relatively long pulse, while obtaining the range resolution corresponding to a short pulse. In this paper, we shall implement (LFM) linear frequency modulation digital pulse compression technique using (FPGA) which has distinct advantages compared to other application specific integrated circuits (ASIC) for the purposes of this work. The FPGA provides flexibility, for example, full reconfiguration in milli-seconds and permits a complete single chip solution.