Design and performance analysis of input-output buffering delta-based ATM switch with backpressure mechanism

Abstract

A new delta-based ATM switch architecture is described that is based on expanding a delta network so that blocking is eased while preserving self routing and path uniqueness. The switch employs a combined external input-output buffering strategy, but operates-in such a way that output buffer overflows never happen. An analytical model, that takes into account this backpressure mechanism, is developed for arbitrary switch parameters, and computer simulations are used to assess the accuracy of the analysis. It is shown that a maximum throughput of above 0.90 can be achieved for a large-size switch using an expansion factor of 16. It is also shown that the backpressure mechanism can reduce the overall memory size needed to achieve a given cell loss performance, compared with the case where it is not used. The switch is shown to compare very well to-the-well-known knockout switch in terms of both performance and complexity. Finally, a distinctive feature of the proposed architecture is that internal node buffering can be used without disturbing cell sequencing.