Design and Performance Analysis of 32 and 64 Point FFT using Multiple Radix Algorithms

Abstract

Always technical designers choice includes algorithms, flowcharts, programming etc., and end users requires the given input and application output. Based upon this view, this paper focus on the advancement of the Fast Fourier Transform (FFT), by doing design and observing the performance analysis of the 32 FFT[1] and 64 point FFT, using Radix-2, Radix-8[17] and Split Radix algorithm. The algorithm is developed by Decimation-In-Time (DIT) of the Fast Fourier Transform (FFT), using VHDL as a design entity and synthesis are performed in Xilinx ISE Design Suite 13.2 version. Using synthesis results performance analysis is done between 32 and 64 point Fast Fourier Transform (FFT)[16] in terms of speed and computational complexity. General Terms Decimation -In-Time (DIT), Fast Fourier Transform (FFT), VHDL