Design and Optimization of N-type SiC Gate Turn-off Thyristor with High Turn-off Gain and High Breakdown Voltage

Abstract

A N-type silicon carbide (SiC) gate turn-off thyristor (GTO) is designed and simulated with Sentaurus TCAD software, the detailed optimization process and final parameters are presented in this paper. By introducing 3-step JTE structure, a maximum breakdown voltage (BV) exceeding 15kV is achieved with 90μm drift layer, and over 13kV BV is available with an etching depth window of 0.28μm. By optimizing the P-base concentration, the maximum turn-off gain of the final structure is 6.01, and the forward voltage drop is 3.51V at 200A/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The results show that this design can effectively increase the operating voltage and current of the power system while reducing dynamic loss.