Abstract
Spin orbit torque magnetic random access memory (SOT-MRAM) has attracted numerous research interests since it promises to overcome the write speed and energy bottlenecks of the conventional STT-MRAM. However, the cell density of SOT-MRAM is constrained due to more access transistors. In this work, we present a NAND-Like architecture for SOT-MRAM with a single transistor and several diodes, as well as a novel adaptive array design based on the proposed cell structure. Compared with the standard SOTMRAM, the proposed SOT-MRAM achieves significant improvement in the cell density by sharing transistors, meanwhile attains a comparable write speed. The overhead of write energy can be compensated by a well-designed write policy.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
