Abstract
In this paper, we present an ultrafast digitizer utilizing the DRS4 switched capacitor array application-specific integrated circuit to achieve an ultrafast sampling speed of at most 5 GS/s. We cascaded all eight channels (sub-channels) of a single DRS4 chip for increased storage depth. The digitizer contains four DRS4 chips, a quad-channel analog-to-digital converter, a controlling field-programmable gate array, a PXI interface, and an SFP+ connector. Consequently, each DRS4 channel has a depth of 8192 points and a vertical resolution of 14 bits. The readout sequences should be broken into several segments and then reordered to obtain the correct sequential data sets, and this offline procedure varies in different readout modes. This paper describes the design and implementation of the hardware; in particular, the respective processing procedures are described in detail. Furthermore, the offset error is calibrated and corrected to improve the precision of the captured waveform in both single-channel and high-resolution modes.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
