Abstract
Low noise amplifier is the front end block of radio-frequency receiver system. Its design required various characteristics such as power gain, noise figure, insertion losses and power consumption. In this paper we have proposed a single stage low noise amplifier design with high gain and low noise using inductive source degeneration topology for frequency range of 3 GHz to 7 GHz and also use the active biasing devices. A range of devices like inductors and capacitors are used to achieve 50 � input impedance with a low noise factor. The design process is simulated process is using Advance Design System (ADS) and implemented in TSMC 0.18 µm CMOS technology. A single stage low noise amplifier has a measured forward gain 25.4 dB and noise figure 2.2 dB at frequency 5.0 GHz.
Highlights
The low noise amplifiers (LNA) are key components in the receiving end of the communication system
The proposed LNA is implemented in TSMC 0.18 μm CMOS technology
The best impedance matching for the high power gain and low noise in frequency range 3 GHz to 7 GHz shown in Fig. 4 to Fig. 7
Summary
The low noise amplifiers (LNA) are key components in the receiving end of the communication system. The device parameters of these two MOSFETs in cascode topology can be design separately, with almost no trade-off [2, 3]. This topology requires more area with complexity. References [4,5,6] presented that LNA which are able to provide gain to input signal powers up to 15 dBm without degrading linearity or adding much noise. Such properties enable the wireless receiver to operate in hostile communication environments. The proposed LNA operates at 5.0 GHz frequency used in IEEE standard 802.11a WLAN
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