Design and modelling of a digital MEMS varactor for wireless applications

Abstract

This paper presents the design and simulation of a 4-bit digital MEMS varactor with high capacitance ratio. The proposed varactor design consists of four beams over a co-planar waveguide (CPW) line. A new truss beam design is proposed in order to reduce the spring constant of conventional solid beam structure which results in pull-in voltage of 24.3V making it suitable for low loss phase shifters and tunable filters. A linear capacitance step is realized by varying the contact area between the CPW line and the beam based on binary weighted bit design. The width and the length of each beam is fixed to 50 μm and 550 μm respectively to ensure similar pull-in voltage for all beams. To improve the reliability of the design in terms of dielectric charging, side pull-down electrode and a new stopper design is introduced. The existence of the stopper would prevent a direct contact between the beams and the pull-down electrode. A high capacitance ratio of 35.7 is achieved through the implementation of a deep trench of 26.35 μm on the silicon substrate which decreases the parasitic and fringing field capacitance. 16 different capacitance states ranging from 95 fF to 3.4 pF are realised. The overall size of the varactor is 740 μm × 603 μm. The CPW line and the beams are made from 2 μm thick aluminium, while 0.25 μm thick silicon nitride is used as the dielectric layer. The mechanical simulation of the design is carried out using Coventorware 2008, while the characterization of the RF performance is conducted using CST Microwave Studio.