Design and length optimization of an adiabatic coupler for on-chip vertical integration of rare-earth-doped double tungstate waveguide amplifiers

Abstract

The integration of rare-earth doped double tungstate waveguide amplifiers onto passive technology platforms enables the on-chip amplification of very high bit rate signals. In this work, a methodology for the optimized design of vertical adiabatic couplers between a passive Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sub> waveguide and the on-chip amplifier is proposed. The methodology shows high efficiency and tolerance in the adiabatic coupler design. The calculated losses of the adiabatic coupler are as low as 0.5 dB for 0.98 μm and 0.14 dB for 1.55 μm. The length of the taper is quantitatively optimized with an adiabatic transfer.