Abstract
The paper presents a novel WTB controller design method using SOPC (system on programmable chip) technology. The WTB Access IP (intellectual property), which is designed in Verilog HDL (hardware description language), achieves the function of encoding, decoding, FCS (frame check sequence) and bit stuffing. Finally the CPU and WTB controller are combined into one Alterapsilas Cyclone II EP2C8, so this method save PCB space and reduce total power consumption. The paper describes each modulepsilas function and design method specifically. Simultaneously the simulation and two different experimentspsila results are given.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have