Design and Implementation of Wideband Stacked Distributed Power Amplifier in 0.13- ${\mu }\text {m}$ CMOS Using Uniform Distributed Topology

Abstract

This paper presents the design and implementation of efficient and wideband stacked distributed power amplifiers (SDPAs) in 0.13- $\mu \text{m}$ CMOS technology. To obtain high output swing along with reasonable gain, a four-transistor stack is utilized. Voltage alignment at the drain of each device in the stack is obtained by allowing a small ac swing at the gate due to voltage division between the gate-source capacitance, $C_{\mathrm{ gs}}$ , and the external gate capacitance. Interstage matching is performed by peaking inductors. Further, the four-transistor stack has been replicated in four sections in a distributed topology to obtain wideband operation. A uniform distributed amplifier topology is adopted to control the impedance at each current injecting node from the stack to the artificial drain lines. Based on the said approach, two topologies, the SDPA and the stacked-cascode distributed power amplifier (SCDPA), are designed, implemented, and compared in terms of their performance. For SDPA, measured results show at least 10±0.3 dB of small-signal gain from 2 to 16 GHz. The SDPA demonstrated a saturated output power of 18 dBm with a peak efficiency of 17% and an OIP3 of 22 dBm. The SCDPA shows a measured small-signal gain of more than 10 dB at low frequencies and drops to 10 dB at 10 GHz. Also, the SCDPA demonstrates a saturated output power of 19.8 dBm with a peak efficiency of 19% and an OIP3 of 23 dBm. Both power amplifiers occupy an area of 0.83mm2.