Abstract
Block ciphers play an essential role in securing the wireless communications. In this paper, an FPGA implementation of the new block cipher SMS4 is presented. The SMS4 Intellectual Property (IP) core includes a non-pipelined encryption/decryption data path with an on-the-fly key scheduler and supports both the Electronic Code Book (ECB) and Cipher Block Chaining (CBC) operation modes. Our result shows that the SMS4 IP core can achieve a high throughput using only a relatively small area. It is well suitable for the field of area restrained condition.
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