Design and Implementation of SRAM for LUT and CLB Using Clocking Mechanism in Quantum-Dot Cellular Automata

Abstract

Quantum-dot cellular automata (QCA) has long been deemed to be an alternative or supplementary to complementary metal oxide semiconductor (CMOS) technology in theory in the future. In general, QCA works indispensably through a four-phase clocking mechanism. However, previous works on QCA circuits mainly use the clocking to enable the synchronization of signals. In this brief, a static random access memory (SRAM) is proposed for the first time by making use of the phase difference between adjacent clock zones of the unique clocking mechanism. The SRAM saves the address decoders and thus reduces the hardware cost. A look-up table (LUT) is then built through the SRAM to achieve a significant reduction in hardware cost. To verify the practicability of these circuits proposed above, a configurable logic block (CLB) in Xilinx’s XC4000 field-programmable gate array as an example is designed. Simulation results using QCADesigner-E show that the proposed circuits have correct functions and advantages in area, cell count, delay, cost, and energy dissipation compared with previous designs. Note that these circuits are easy to be extended to 16-bit, 32-bit, or higher bit.